Graduate Research Assistance Vacancy in Design and Optimization of Digital Hardware Circuit for FPGA IP Core
Project title: Graduate Research Assistance Vacancy in Design and Optimization of Digital Hardware Circuit for FPGA IP Core
Funding agency: Universiti Malaysia Perlis (UniMAP) and Industry
Contact: Assoc. Prof. Dr. Asral Bin Bahari Jambek (firstname.lastname@example.org)
Nationality requirement: Open to Malaysian and non-Malaysian applicants
Stipend: RM2500 per month (12 months)
Vacancy available: 3 positions
Project start date: Jan 2023
This project is part of the UniMAP-Industry partnership program. The potential candidate will be registered as a Master by Research at UniMAP and will work on real-world R&D engineering problems. The selected candidate student will be assigned to design a digital block using an FPGA development kit provided by the University. Training on FPGA tools and methodologies will be provided. At the end of this project, we target to generate a strong future engineers that’s are proficient in FPGA IP development.
Potential candidates are expected to have knowledge of C-programming and Verilog HDL, be self-motivated, and able to work under minimal supervision. Experience in the industry is a plus. This project will benefit from the knowledge of electronics, integrated circuit design, digital design, microcontrollers, microprocessors, and computer architecture.