(Free) DLP : Low Power Motion Estimation Specific Instruction-set Processors (MESIP): Novel Design Challenge For Nano Technology Era | 17 & 18 Dec 2014

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IEEE CASS Malaysia would like to cordially invite you to the Distinguished Lecture sponsored by IEEE Circuits and Systems Society. The details are as below:

 

Title:       Low Power Motion Estimation Specific Instruction-set Processors (MESIP): 

Novel Design Challenge For Nano Technology Era

Speaker: Prof. Myung  H.  Sunwoo from Ajou University, South Korea.

 

Session 1

Date:       17th December 2014 (Wednesday)

Time:      1500 – 1600 pm

Venue:    Seminar Hall, Level 2, Faculty of Engineering, Universiti Putra Malaysia.

 

Session 2

Date:       18th December 2014 (Thursday)

Time:      1500 – 1600 pm

Venue:   Seminar Room (22-02-19), Block 22, Electrical & Electronic Engineering Department, Universiti Teknologi Petronas.

 

 

Abstract: ASICs have been widely used to implement Motion Estimation (ME) algorithms, however, ASICs should be redesigned whenever changes are made in algorithms. Because of soaring non-recurring engineering (NRE) costs, ASIC solutions are not practical when dealing with rapidly changing ME algorithms. Recently, Application Specific Instruction-set Processors (ASIPs) which can give both relatively high performance low power of ASICs and flexibility of processors have emerged as promising solutions. This talk introduces a Motion Estimation Specific Instruction-set Processor (MESIP) for video applications having two types of pattern registers and a special instruction set, which can efficiently support various ME algorithms. MESIP can significantly reduce the number of cycles, and memory accesses and thus, dramatically save power consumption. MESIP has been implemented with the IBM’s 90nm CMOS technology and has 203K gates excluding memory and it can reduce the number of the required instructions by up to 18.9% compared with the existing ME processors. Hence, ASIP can be a promising solution to implement rapidly changing various applications and it can save huge NRE costs in nano technology era.

 

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Biography

Myung   H.   Sunwoo   received   the   B.S.   degree   in Electronics Engineering (EE)from Sogang University in 1980, the M.S. degree in EE from Korea Advanced Institute ofScience and Technology (KAIST) in 1982, and the Ph.D. degree in Electrical andComputer Engineering  (ECE) from  the  University  of  Texas  at Austin in 1990. Heworked for Electronics and Telecommunications Research  Institute  (ETRI)  in Daejeon,Korea from 1982 to 1985, and Digital Signal Processor Operations, Motorola, Austin, TXfrom 1990 to 1992. Since 1992, he has been a Professor with the School of ECE, AjouUniversity in Suwon, Korea. In 2000, he was a Visiting Professor at the University ofCalifornia, Davis, CA. He has authored over 390 papers and also holds 60 patents. Hereceived 34 research awards including the Best Paper Award from the IEEE Workshopon Signal Processing Systems (SiPS) 2005, International SoC Conference (ISOCC) in2003, 2005, 2008, 2009, and IEEE Seoul Section in 2004, Samsung Electronics, and the Institute of ElectronicsEngineers of Korea (IEEK). His research interests include low power algorithms and architectures, SOC design formultimedia and communications, and application-specific design. He served as the General Chair of InternationalSymposium on Circuits and Systems (ISCAS) 2012, Seoul Korea. He served as the Technical Program Chair of the IEEEWorkshop on SiPS in 2003, General Co-Chair of ISOCC, and General Chair of the IEEK SOC Conference in 2008. Hehas been a Technical Committee member for numerous conferences and societies. He was an Associate Editor for theIEEE Transactions on Very Large Scale Integration (VLSI) Systems (2002–2003), Guest Editor for the Journal ofVLSI Signal  Processing (Kluwer, 2004) and served on Guest Editor for the Journal of Signal Processing Systems(Springer-Verlag, 2012). He was elected as a member of the Board of Governors (BoG) for IEEE CASS, was reelectedfor 2011-2016 and was a Distinguished Lecturer of the IEEE CASS in 2009-2010. He was a Director of the NationalResearch Laboratory sponsored by the Ministry of Science and Technology, and an Executive Director of IEEK. He is aPresident of the IEEK Semiconductor Society and he was a Chair of the IEEK SOC Design Technical Committee. He wasan honorary ambassador of Korean Tourism Organization. He is a Chair of the IEEE CASS, Seoul Chapter and a Fellowof IEEE.

 

The lecture is organised by: The IEEE CASS Malaysia Chapter and Department of Electrical and Electronic Engineering, Universiti Putra Malaysia and Department of Electrical & Electronic Engineering, Universiti Teknologi Petronas.

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