SEMICONDUCTOR ADVANCED PACKAGING WORKSHOP | 23 & 24 Sept 2013

advance_packaging_workshop

 

SEMICONDUCTOR ADVANCED PACKAGING WORKSHOP
EASTERN & ORIENTAL HOTEL, PENANG, 23rd SEPTEMBER, 2013
PALM GARDEN HOTEL IOI RESORT, PUTRAJAYA, 24th SEPTEMBER, 2013

The electronic packaging has gone through a large transformation for past few years, with several technologies greatly influencing the advanced electronics packaging field, such as TSV usage in 3DIC integration. On the other end of the market, LEDs with MEMs are drawing on existing semiconductor and packaging technologies for solutions to their own problems. The CPMT Malaysia chapter is organizing a one-day Advanced Packaging Workshop both in Penang and Kuala Lumpur, Malaysia to examine the technologies used in the electronics packaging industry and their market and technology trends, such as their applications at device level. Participants will also discuss the pros and cons of each packaging technology, and the technology and manufacturing roadmap to resolve these issues. You will also know the packaging services suppliers in the industry and what state-of-the-art manufacturing processes they utilize. All the different segments of electronic packaging will be covered in th!
is workshop to provide you a good overview of the industry, moving along the supply chain from manufacturers to foundries and OEMs. Key 5 year trends are examined, among them manufacturing roadmaps and production process roadmaps. There will be two parts of this seminar.

PART I – 8:30 AM – 12:00 NOON
TRENDS, MANUFACTURING READINESS, SUPPLY CHAIN FOR FAN-OUT & FAN-IN WLP, TSV, LED PACKAGING.
Ms. Rozalia Beica, France

COURSE CONTENTS

Several technologies are heavily impacting the evolutions of the advanced packaging fields, like FOWLP, FI WLP, and the use of TSV for 3D IC integration. On the other side of the market, LED (with Mems) are re-using semiconductor technologies and existing packaging technologies in order to find solutions for their own problems.

The presentation will analyze in details the market and technologies trends linked to FOWLP, FIWLP, TSV and LED packaging, highlighting the following points:

·          What are today’s  applications and markets trends at device level?

·          Who are today suppliers of FOWLP, FIWLP, TSV and LED packaging services among IDM, OSAT and foundries?

·          What are the state of the art in manufacturing and the key trends in the next 5 years?

·          What is today in production’s process and what is the production roadmap for the next 5 years?

·          What are the advantages and drawbacks of each technology and the technology and process roadmap to solve such issues?

·          Who is doing what along the supply chain, from equipment and materials manufacturers to OSAT, foundries and OEM?

PART II – 1:30 PM – 5:00 PM
POWER DEVICES AND PACKAGING TECHNOLOGIES TRENDS AND CHALLENGES ON FUTURE POWER ELECTRONIC SYSTEM DEVELOPMENT
Dr. Leo Lorenz, Germany

COURSE CONTENTS

The megatrends of our modern society such as energy efficiency, E-Mobility and Renewable Energy Technologies are asking for green power Electronic solutions. Power semiconductor devices are an enabling technology to meet these requirements. The major electrical improvement of the new generation of power devices is coming from the overall silicon utilization (vertical & horizontal devices optimization). The reliability and ruggedness of these new power semiconductors is driven by an advanced chip interfacing and packaging technology. For ultra high efficiency and ultra high power density solutions WB-devices are being developed. However it has to be considered that the application engineer is faced with new challenges of how to manage all the parasitic; thermal management and circuit set up. In the presentation the development trend of Power Semiconductor Devices including Wide Bandgap devices will be shown and the challenges in the application will be discussed. New devices !
structures will be highlighted and their impact on the electrical and thermal performance outlined. Additionally for one device type there will be a comparison in the development of Silicon based devices with WB- based devices. The electrical performance of key devices families in some specific applications will be demonstrated.

Addressing the wide range of power electronic applications – from Milli Watt power needed for the operation of mobile phones up to Giga Watt power for energy transmission lines – and looking into power electronics potential for energy efficiency and sustainability in these applications a variety of different power device & packaging technologies will remain in the next decades.

The power semiconductor industry is well prepared to remain as a key technology driver for future power electronics converters.

REGISTRATION

Registration Fees

IEEE member :                                   RM 250.00

Non-IEEE member :                        RM 350.00

IEEE student members :                RM   50.00

Non-IEEE Student members :     RM 100.00

All payment must be made in Ringgit Malaysia and payable to IEEE CPMT MALAYSIA. Registration fee includes seminar, lunch, coffee breaks and a copy of the training material.

Submission of completed form (by email or fax) with your remittance to:

The Secretariat,
IEEE CPMT Advanced Packaging Workshop
ON Semiconductor (PIDC)
SCG Ind. Malaysia Sdn. Bhd.,
Lot 122, Senawang Industrial Estate,
70450 Seremban, Negeri Sembilan.
Email : FadzilatulHusna.Adnan@onsemi.com
Tel : 06 – 671 2062/Fax : 06 – 678 0725

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