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GRA Vacancy on “The Design of Tunable Inductor in CMOS Oscillator Circuit for Multimode Low Power IOT Transceiver” Project

University / Institute Universiti Sains Malaysia
Research Center/Lab (optional) NA
Website URL for the Research Center/Lab (optional) NA
Project Title The Design of Tunable Inductor in CMOS Oscillator Circuit for Multimode Low Power IOT Transceiver
Start Date Sep 04, 2017
End Date Aug 31, 2020
Contact Name / Email(s) Assoc. Prof. Ir. Dr. Norlaili Mohd. Noh
Contact Phone(s) 04-5996023
Nationality Requirements on Candidate(s) Applicants must be Malaysian citizens
Description Candidate:
Full time PhD (36 months). Study fees fully sponsored. Registration with School of Electrical and Electronic Engineering, USM. Research location is at Silterra Malaysia Sdn. Bhd.
Pre-requisite qualification:
Bachelor degree in Electronic Engineering with CGPA more than 3.5 (initial registration for MSc and conversion to PhD within 1 year) or Masters in Electronic Engineering with 3 ISI journal publications. Experience/skill in using Cadence Layout Virtuoso is an advantage.
Candidate with MSc – fixed RM4300/mth; Candidate with BEng. – RM3000/mth during the MSc candidature before conversion to PhD within 1 year and RM4300/mth once converted to PhD candidature.
Project brief description:
This project is on the utilization of tunable inductor in the VCO. The inductance tuning range benefits from the idea of changing the magnetic field of monolithic planar inductor. This technique incorporates metal shields to the monolithic inductor, with all metal shields made isolated from each other. The floating and shorting to ground of these metal shields provide a fine-tuning range for the inductance. Rigorous work need to be conducted to develop the tunable inductor into an efficient and commercially applicable device especially in terms of good Q-factor and frequency tuning range. These merits will reduce the limitation of the tuning range in VCOs for IoT multiband transceivers.

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